Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

ldcm.d CP#, Rp{++}, ReglistCPD8 

Loadaddress  =Rp;
for (i = 7 to 0)
      if ReglistCPD8[i] == 1 then
            CP#(CR(2*i+1))   =*(Loadaddress++);
            CP#(CR(2*i))   =*(Loadaddress++);
if Opcode[++] == 1 then
      Rp   = Loadaddress;
 
# ∈ {0, 1, …, 7}
p ∈ {0, 1, …, 15}

Rev1+

111011011010

Rp

CP#

++

0100

ReglistCPD8[7:1]

CR

15-14

CR

13-12

CR

11-10

CR

9-8

CR

7-6

CR

5-4

CR

3-2

ReglistCPD8[0]

CR

1-0

12

4

3

1

4

7

1

2

ldcm.w CP#, Rp{++}, ReglistCPH8 

Loadaddress  =Rp;
for (i = 7 to 0)
      if ReglistCPH8[i] == 1 then
            CP#(CRi+8)   =*(Loadaddress++);
if Opcode[++] == 1 then
      Rp   = Loadaddress;
 
# ∈ {0, 1, …, 7}
p ∈ {0, 1, …, 15}

Rev1+

111011011010

Rp

CP#

++

0001

ReglistCPH8[7:1]

CR

15

CR

14

CR

13

CR

12

CR

11

CR

10

CR

9

ReglistCPH8[0]

CR

8

12

4

3

1

4

7

1

3

ldcm.w CP#, Rp{++}, ReglistCPL8 

Loadaddress  =Rp;
for (i = 7 to 0)
      if ReglistCPL8[i] == 1 then
            CP#(CRi)   =*(Loadaddress++);
if Opcode[++] == 1 then
      Rp   = Loadaddress;
 
# ∈ {0, 1, …, 7}
p ∈ {0, 1, …, 15}

Rev1+

111011011010

Rp

CP#

++

0000

ReglistCPL8[7:1]

CR

7

CR

6

CR

5

CR

4

CR

3

CR

2

CR

1

ReglistCPL8[0]

CR

0

12

4

3

1

4

7

1

Description

Reads the memory locations specified into the addressed coprocessor. The pointer register can optionally be updated after the operation.

Status Flags:

Q:

Not affected.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.

Example: 

ldcm.w CP2, SP++, CR2-CR5

Note:

Emtpy ReglistCPL8/ReglistCPL8/ReglistCPD8 gives UNDEFINED result.